Digital electronic systems, e.g., computer systems, often comprise a number of circuit domains that need to communicate with one another using different interfaces, each running at an optimized speed for increased performance. Typically, multiple clock signals having related frequencies are utilized for providing appropriate timing to the interfaces. For instance, a clock signal with a particular frequency may be provided separately to two circuits that are physically spaced apart, wherein one circuit is operable to transmit data to the other. Accordingly, where data is to be transferred at high rates between a transmitting circuit and a receiving circuit, a clock signal is also provided by the transmitting circuit via a separate trace such that data may be registered accurately at the receiving end using a local clock signal that is derived from the transmitted clock signal (which may also be referred to as the transported clock signal). In such applications, it would be necessary that the clock signal used for clocking out data towards the receiving circuit be disposed in a known relationship with the transported clock signal so that proper timing reference may be obtained for capturing the data. There are no known mechanisms that address this requirement, however.